参数资料
型号: IN74HC573A
厂商: INTEGRAL JOINT STOCK COMPANY
英文描述: Octal 3-State Noninverting Transparent Latch
中文描述: 八路三态同相透明锁存器
文件页数: 4/5页
文件大?。?/td> 117K
代理商: IN74HC573A
IN74HC573A
406
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
V
CC
V
Guaranteed Limit
25
°
C
to
-55
°
C
150
30
26
Symbol
Parameter
85
°
C
125
°
C
Unit
t
PLH
, t
PHL
Maximum Propagation Delay, Input D to Q
(Figures 1 and 5)
2.0
4.5
6.0
190
38
33
225
45
38
ns
t
PLH
, t
PHL
Maximum Propagation Delay,Latch Enable
to Q (Figures 2 and 5)
2.0
4.5
6.0
160
32
27
200
40
34
240
48
41
ns
t
PLZ
, t
PHZ
Maximum Propagation Delay, Output Enable to Q
(Figures 3 and 6)
2.0
4.5
6.0
150
30
26
190
38
33
225
45
38
ns
t
PZH
, t
PZL
Maximum Propagation Delay, Output Enable to Q
(Figures 3 and 6)
2.0
4.5
6.0
150
30
26
190
38
33
225
45
38
ns
t
TLH
, t
THL
Maximum Output Transition Time, Any Output
(Figures 1 and 5)
2.0
4.5
6.0
60
12
10
75
15
13
90
18
15
ns
C
IN
C
OUT
Maximum Input Capacitance
-
10
10
10
pF
Maximum Three-State Output Capacitance
(Output in High-Impedance State)
-
15
15
15
pF
Power Dissipation Capacitance (Per Enabled
Output)
Typical @25
°
C,V
CC
=5.0 V
C
PD
Used to determine the no-load dynamic power
consumption: P
D
=C
PD
V
CC
2
f+I
CC
V
CC
23
pF
TIMING REQUIREMENTS
(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
V
CC
V
Guaranteed Limit
85
°
C
Symbol
Parameter
25
°
C to
-55
°
C
50
10
9
125
°
C
Unit
t
SU
Minimum Setup Time, Input D
to Latch Enable
(Figure 4)
2.0
4.5
6.0
65
13
11
75
15
13
ns
t
h
Minimum Hold Time, Latch
Enable to Input D
(Figure 4)
2.0
4.5
6.0
5
5
5
5
5
5
5
5
5
ns
t
w
Minimum Pulse Width, Latch
Enable (Figure 2)
2.0
4.5
6.0
75
15
13
95
19
16
110
22
19
ns
t
r,
t
f
Maximum Input Rise and Fall
Times (Figure 1)
2.0
4.5
6.0
1000
500
400
1000
500
400
1000
500
400
ns
相关PDF资料
PDF描述
IN74HC573ADW Octal 3-State Noninverting Transparent Latch
IN74HC573AN Octal 3-State Noninverting Transparent Latch
IN74HC595A 8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs
IN74HC595AD 8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs
IN74HC595AN 8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs
相关代理商/技术参数
参数描述
IN74HC573ADW 制造商:IKSEMICON 制造商全称:IK Semicon Co., Ltd 功能描述:Octal 3-State Noninverting Transparent Latch High-Performance Silicon-Gate CMOS
IN74HC573AN 制造商:IKSEMICON 制造商全称:IK Semicon Co., Ltd 功能描述:Octal 3-State Noninverting Transparent Latch High-Performance Silicon-Gate CMOS
IN74HC574 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:Noninverting D Flip-Flop
IN74HC574A 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:Noninverting D Flip-Flop
IN74HC574ADW 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:Noninverting D Flip-Flop
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